New Software Tool Helps with Floorplanning for System on a Chip

Magma takes floorplanning to another level, so to speak

"Floorplanning for SoCs seems to be a subject rife with paradox. On one hand, the exercise of iteratively refining the chip's floorplan seems to be the axel that holds hierarchical design together. On the other hand, improving the floorplan always seems to require one more level of detail than is currently available to the planners. So invariably, the floorplan is based on estimates of the size, shape, and timing of the blocks, and its quality depends heavily on the experience of the senior design staff...

"Next, Hydra can automatically generate primary floorplans, including creation of voltage domains, pin and pad placement, and gradual definition of the inner shapes of the blocks. At this point the tool can work interactively with designers to absorb, for example, information about the shape and location of hard IP blocks. The tool also creates partitions in the logical hierarchy automatically, impacting pin placement and timing as things get laid out.

"The information thus generated is passed as constraints to a shaping engine, which shapes the partitions that have been defined on the logical hierarchy, and also places and legalizes macros with a shape- and congestion-aware auto-placement engine. With this process complete, Hydra can automatically generate power grids and clock tree hierarchy. At this point the tool can generate production-quality top-level clock structures and prototype-quality block-level clock trees, Bali says. Hydra can also work with Magma's package co-design tools on placing bumps, I/O cells, and redistribution layer information along with the emerging floor plan...

"A key part of the process now, according to Bali, is budgeting. The information Hydra has generated in the process of constructing the floorplan gets pushed down to the block level as timing budgets and other constraints for the block implementation tools. As blocks are implemented, Hydra allows abstraction of detailed block designs back into the floorplanning process to refine the emerging picture of the full chip. By maintaining relative floorplanning constraints, the tool can incorporate changes without disrupting the rest of the plan.Thus, Magma claims, the tool provides a single cockpit for managing an hierarchical design from early exploration through implementation and into the final assembly process. Bali says that Hydra is unique in its ability to serve the team from planning through prototyping, and on to the preparation of the production-ready floorplan."

AI system for static and dynamic analysis of MEMS design and manufacture

artificial intelligence approach for the design and manufacturing of micro electro mechanical systems


Micro Electro Mechanical Systems (MEMS) is a new field. However, the application of MEMS has increased drastically for the past decade. The design and manufacturing of MEMS require specific expertise. A computerized consultant system for thorough static and dynamic analysis of MEMS is needed for design and manufacturing. A PC-based Expert System, EASYMEMS, has been developed. EASYMEMS contains domain specific knowledge of MEMS as well as the reasoning process of a human expert. It includes three sections: material, design, and manufacturing. It can be used to select the material for MEMS. It supports human reasoning and thus can offer MEMS design guidelines for engineers. It is also capable of performing thorough static and dynamic analysis and then calculating critical dimensions for the design of MEMS. Furthermore, it can be used for the consultation for MEMS manufacture. The computer graphics offered by EASYMEMS are very helpful for both MEMS design and manufacturing. In simple words, EASYMEMS is very user-friendly and is very beneficial for MEMS engineers.